VHSIC Hardware Description Language Brief History

VHDL was originally developed at the behest of the US Department of Defense in order to document the behaviour of the ASICs that supplier companies were including in equipment. That is to say, VHDL was developed as an alternative to huge, complex manuals which were subject to implementation-specific details.

As should be obvious from the example code below, VHDL has a syntax similar to Pascal and Ada, thus being a descendant of Algol. VHDL is case insensitive.

The idea of being able to simulate this behaviour was so obviously attractive that logic simulator s were developed that could read the VHDL files. The next step was the development of logic synthesis tools that read the VHDL, and output a definition of the physical implementation of the circuit. Modern synthesis tools can extract RAM, counter, and arithmetic blocks out of the code, and implement them according to what the user specifies. Thus, the same VHDL code could be synthesized differently for lowest cost, highest power efficiency, highest speed, etc.

The initial version of VHDL, to standard IEEE 1076-1987, included a wide range of data types, including numerical ( integerThe integers consist of the positive natural numbers (1, 2, 3, …) the negative natural numbers (−1, −2, −3,. and the number zero. The set of all integers is usually denoted in mathematics by Z (or Z in blackboard bold, ), which st and real), logical ( bitThis article is about the unit of information, see Bit (disambiguation) for other meanings. A bit (abbreviated b is the most basic information unit used in computing and information theory. A single bit (short for b inary dig it is a zero or a one, or a t and booleanIn mathematics and computer science, Boolean algebras or Boolean lattices are algebraic structures which "capture the essence" of the logical operations AND, OR and NOT as well as the corresponding set theoretic operations intersection, union and compleme), characterFor alternate meanings, see character. In computer terminology, a character is a unit of information that roughly corresponds to a grapheme, or written symbol, of a natural language, such as a letter, numeral, or punctuation mark. The concept also include and timeFor alternate uses of "time", see Time (disambiguation). Time quantifies or measures the interval between events, or the duration of events. Time has long been perceived as a dimension in which each event has a definite (but not necessarily unique) positi, plus arraysIn computer programming, an array also known as a vector or list, is one of the simplest data structures. Arrays hold a fixed number of equally-sized data elements, generally of the same data type. Individual elements are accessed by index using a consecu of bit called bit_vector and of character called stringGenerally, string is a thin piece of fiber which is used to tie, bind, or hang other objects. String can be made from a variety of fibres. You can get different kinds, twine for example. The term has more specific meanings, within certain academic discipl.

A problem not solved by this edition, however, was "multi-valued logic", where a signal's drive strength (none, weak or strong) and unknown values are also considered. This required IEEE standard 1164, which defined the 9-value std_logic.

The second issue of IEEE 1076, in 1993, made the syntax more consistent, allowed more flexibility in naming, extended the character type to match the full 8-bit ASCII definition, added the xnor operator, etc.

2 Discussion

VHDL is in fact a fairly general-purpose programming language, provided that you have a simulator on which to run the code. It can read and write files on the host computer - a VHDL program can be written that generates another VHDL program to be incorporated in the design being developed. Because of this general-purpose nature, it is possible to use VHDL to write a testbench that verifies the functionality of the design, using files on the host computer to define stimulus, interacts with the user, and compares results with those expected. In this regard, it is considered by some to be superior to Verilog. However, both languages make it easy for the unwary and inexperienced to produce code that simulates successfully, but that cannot be synthesized into a real device, or else is too large to be practicable. A particular pitfall in both languages is producing transparent latches rather than D-type flip-flops as storage elements.

3 Code Examples

These are written in VHDL-93 with its more consistent syntax.

3.1 Hello World

The canonical first program example:

-- VHDL example programme: hello.vhd use std.textio.all; entity hello is end entity hello; architecture Wiki of hello is constant message : string := "hello world"; begin process is variable L: line; begin write(L, message); writeline(output, L); wait; end process; end architecture Wiki;

The intended message is output to the simulator's default output window.

3.2 Fibonacci Series

The following example is a little more real-world:

-- Fib.vhd -- -- Fibonacci number sequence generator library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; entity Fibonacci is port ( Reset : in std_logic; Clock : in std_logic; Number : out unsigned(31 downto 0) ); end entity Fibonacci; architecture Rcingham of Fibonacci is signal Previous : natural; signal Current : natural; signal Next_Fib : natural; begin Adder: Next_Fib <= Current + Previous; Registers: process (Clock, Reset) is begin if Reset = '1' then Previous <= 1; Current <= 1; elsif Clock'event and Clock = '1' then Previous <= Current; Current <= Next_Fib; end if; end process Registers; Number <= to_unsigned(Previous, 32); end architecture Rcingham;

When simulated, it generates the Fibonacci sequence successfully, until Next_Fib overflows the range of the natural type.

When synthesized with an FPGA vendor's tools, an "Adder" module was implemented, as hoped for. Otherwise, the assignment statement would have to be replaced by a component instantiation to logic that implements that function.

4 External links

http://www.eda.org/ contains lots of useful information including a FAQ
The FAQ of news://comp.lang.vhdl
VHDL International
VHDL'87 syntax as Hypertext
VHDL'93 syntax as Hypertext
VHDL-AMS syntax as Hypertext
IEEE standard 1164
'99 bottles of beer' in VHDL to compare with other programming languages

Hardware description languages

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Home > VHSIC Hardware Description Language

1 Brief History