Science  People  Locations  Timeline
Index: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Home > SPARC


SPARC (Scalable Processor ARChitecture) is a RISC microprocessor architecture originally designed in 1985 by Sun Microsystems.

SPARC is a registered trademark of SPARC International, Inc., an organisation established in 1989 to promote the SPARC and to provide conformance testing. SPARC International was intended to "open" the SPARC architecture to make a larger ecosystem for the design, and has been licensed to several manufacturers, including Texas Instruments, Cypress Semiconductor, and Fujitsu. As a result of SPARC International, the SPARC architecture is fully open and non-proprietary: there's a fully open source implementation called LEON2 which VHDL source code is available under LGPL.

Implementations of SPARC architecture were initially designed and used for workstations, and then used for larger SMP servers produced by Sun Microsystems and Fujitsu among others.

There have been several revisions of the architecture. Most recent ones are the version 8 and the version 9.

1 Features

The SPARC architecture was heavily influenced by the earlier designs of the RISC I & II from the University of California, Berkeley. These original RISC designs were minimalist, including as few features or op-codes as possible and demanding that all operations complete in one cycle. This made them similar to the MIPS architecture in many ways, including the lack of instructions such as multiply or divide. Another feature of SPARC influenced by this early RISC movement is the branch delay slot.

The SPARC processor usually contains as many as 128 general purpose registers. At any point, only 32 of them are available - 8 are global registers and the other 24 are from the stack of registers. These 24 registers form what is called a register windowIn computer engineering, the use of register windows is a technique to improve the performance of a particularly common operation, the procedure call. By devoting hardware to this problem, almost all computer programs will run faster. This was one of the, and at function call/return, this window is moved up and down the register stack. Each window has 8 local registers and shares 8 registers with adjacent windows. The shared registers are used for passing function parameters and returning values, and the local registers are used for keeping values across function calls. The "Scalable" in SPARC comes from the fact that the SPARC specification allows up to 32 windows. So the implementation can choose to implement all 32 to provide maximum call stack efficiency, or to implement minimum to reduce the context switching time. Other architectures that include similar register windows include Intel i960Intel's i960 (or 80960 was a RISC-based microprocessor design that became quite popular during the early 1990s as an embedded microcontroller, for some time likely the best-selling CPU in that field, pushing the AMD 29000 from that spot. In spite of its s, IA-64In computing, IA-64 (Intel Architecture-64) is a 64-bit CPU architecture developed by Intel and Hewlett-Packard for processors such as Itanium. The goal of Itanium is to produce a "post- RISC era" high performance architecture using a very long instructio, and AMD 29000 .

Floating pointComputer arithmetic A floating-point number is a digital representation for a number in a certain subset of the rational numbers, and is often used to approximate an arbitrary real number on a computer. In particular, it represents an integer or fixed-poi registers.

In version 8, the floating-point register file has 16 double precisionIn computing, double precision is a computer numbering format that occupies two storage locations in computer memory at address and address+1. A double precision number sometimes simply a double may be defined to be an integer, fixed point, or floating po registers. Each of them can be used as two single precisionIn computing, single precision is a computer numbering format that occupies one storage locations in computer memory at address. A single-precision number sometimes simply a single may be defined to be an integer, fixed point, or floating point. Pedantic registers, providing a total of 32 single precision registers. An odd-even number pair of double precision registers can be used as a quad precision register, thus allowing 8 quad precision registers. Version 9 added 16 more double precision registers, but these additional double precision registers can not be used as single precision registers.

Tagged add and subtract instructions perform adds and subtracts on values assuming that the bottom two bits do not participate in the computation. This can be useful in the implementation of the run time for MLML is a general-purpose functional programming language developed by Robin Milner and others in the late 1970s at Edinburgh University, whose syntax is inspired by ISWIM. Historically, ML stands for metalanguage as it was conceived to develop proof tactic, Lisp, and similar languages that might use a tagged integer format.



Read more »

Non User