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HyperTransport runs at 200-1400 MHz (compared to PCI at either 33 or 66 MHz). It is also a DDR or "double-data-rate" bus, meaning it sends data on both the rising and failing edges of the 1400 MHz clock signal. This allows for a maximum data rate of 2800 MTransfers/s per pair. The frequency is auto-negotiated.
HyperTransport supports an auto-negotiated bus widths, from 2 (bidirectional serial, 1 bit each way) to 32-bit (16 each way) busses are allowed. The full-sized, full-speed 32-bit bus has a transfer rate of 22,400 MByte/s, making it much faster than existing standards. Busses of various widths can be mixed together in a single application, which allows for high speed busses between main memory and the CPU, and lower speed busses to peripheralFor an account of the word "periphery" as it is used in biology, sociology, politics, computer hardware, and other fields, see the periphery disambiguation page. A peripheral is a type of computer hardware that is added to a host computer, in order to exps, as appropriate. The technology also has much lower latency than other solutions.
HyperTransport is packet-based, with each packet always consisting of a set of 32-bit32-bit is a term applied to processors, and computer architectures which manipulate the address and data in 32- bit chunks. It is also a term given to a generation of computers where 32-bit processors were the norm. The range of integer values that can be words, regardless of the physical width of the bus interconnect. The first word in a packet is always a command word. If a packet contains an address, the last 8 bits of the command word are chained with the next 32-bit word to make a 40-bit address. The remaining 32-bit words in a packet are the data payload. Transfers are always padded to a multiple of 32 bits, regardless of their actual length.
Its electrical interface uses 1.2 volt Low Voltage Differential Signaling (LVDS).
The primary uses for HyperTransport will be to replace the front-side bus, which is currently different for every machine (or some set of them). For instance, a PentiumThe Pentium is a fifth-generation x86 architecture microprocessor by Intel which first shipped on March 22, 1993. It is the successor to the 486 line. The Pentium was originally to be named 80586 or i586, but the name was changed to Pentium because number cannot be plugged into a PCI bus. In order to expand the system the front-side bus must connect through adaptors for the various standard busses, like AGP or PCI. These are typically included in a controller called either the northbridge or the southbridge depending on the bus being connected to.
A similar computer implemented with HyperTransport is more flexible, as well as being faster. A single PCI<->HyperTransport adaptor chip will work with any HyperTransport enabled microprocessor and allow the use of PCI cards with these processors. The NVIDIA NForce chip sets is any example product.